IEC 61188-6-2:2021

Overview

IEC 61188-6-2:2021 establishes essential requirements for the design and use of land patterns for surface mounting components (SMD) on circuit boards. Developed by the International Electrotechnical Commission (IEC), this standard provides comprehensive guidelines to ensure the compatibility and reliability of soldering surfaces for the most common SMD packages. Grounded in the solder joint requirements of IEC 61191‑2, IEC 61188-6-2 is a critical reference for PCB designers, manufacturers, and anyone involved in electronic assembly. The document outlines both generic and specific approaches to land pattern dimensioning, catering to reflow and wave soldering processes and supporting quality-driven, consistent PCB manufacturing worldwide.

Key Topics

• Land Pattern Design Principles
  • Describes how to determine the correct dimensions for SMD land patterns, including considerations for component and board tolerances, and soldering process type (reflow or wave soldering).
• Solder Joint Requirements
  • Aligns with IEC 61191-2 to ensure solder joint reliability and improve assembly quality.
• Terminal and Package Types
  • Details dimensioning for multiple SMD terminal configurations, including flat bottom, gull wing, J-lead, and bottom termination types.
• Class of Land Pattern
  • Differentiates land pattern requirements based on soldering method, supporting robust attachment and inspection.
• Courtyard Excess and Producibility
  • Addresses the need for courtyard excess based on equipment performance and component size, balancing manufacturability and reliability.

Applications

IEC 61188-6-2:2021 is directly applicable in the following scenarios:

• PCB Layout Design
  • Enables PCB designers to define optimal footprint dimensions, reducing the risk of soldering defects and mechanical issues.
• Electronic Assembly & Manufacturing
  • Guides manufacturers in selecting or verifying land pattern dimensions for high-volume SMD assembly using reflow or wave soldering.
• Quality Assurance and Process Optimization
  • Supports engineers in meeting inspection criteria and reliability standards by adhering to globally recognized land pattern rules.
• Library and CAD System Integration
  • Provides a standardized approach for creating and managing component land pattern libraries in electronic CAD systems.
• Component Selection and PCB Producibility
  • Assists purchasers and designers in ensuring selected components can be reliably mounted and soldered on the PCB, minimizing rework and field failures.

By adhering to this standard, organizations enhance product consistency, interoperability, and global market acceptance.

Related Standards

For a comprehensive approach to PCB and SMD assembly, IEC 61188-6-2:2021 should be applied alongside the following standards:

• IEC 61191-2:2017 – Defines general and process requirements for surface mount soldered assemblies, forming the technical foundation for land pattern requirements.
• IEC 60194-2 – Provides standardized terminologies for printed board and electronic technologies.
• IEC 61188-6-1 – Offers generic requirements for land pattern design, applicable to a broad range of PCB types.
• IEC 61188-6-4 – Focuses on dimensional drawings of SMD from the perspective of land pattern design, supporting accurate footprint creation.

Implementing IEC 61188-6-2 in harmony with these international standards streamlines PCB design workflows, ensures compliance, and fosters high-quality, reliable electronic products.

Keywords: IEC 61188-6-2, SMD land pattern, surface mounted components, PCB design, solder joint requirements, reflow soldering, wave soldering, printed circuit board patterns, electronic assembly standards, IEC 61191-2 compliance, PCB land pattern standard.