IEC 63093-5:2018

Overview - IEC 63093-5:2018 (EP‑cores, ferrite cores)

IEC 63093-5:2018 provides dimensional and surface‑quality guidelines for a preferred range of EP‑cores made of ferrite, and for the associated parts used in inductors and transformers. The standard defines the principal dimensions required for mechanical interchangeability, essential coil‑former dimensions, and the location of terminal pins on a 2.50 mm printed‑wiring board grid. It also specifies allowable limits of surface irregularities (chips, cracks, pores, crystallites, flash, pull‑outs) and refers to IEC 60205 for calculation of effective magnetic parameters.

Key topics and technical requirements

• Principal dimensions of EP‑cores: standardized A, B, C, E, F, K, D values and size ranges (EP5…EP30) to ensure mechanical interchangeability of core pairs.
• Effective parameters (Ae, le, Ve, Amin): recommended values and calculation method references (see IEC 60205) for magnetic design and inductance calculations.
• Coil‑former dimensional limits: e, f1, f2, d, s min/max ranges to secure fit and winding compatibility.
• Pin locations and base outlines: SMD and PTH pin footprints referenced to a 2.50 mm grid for PCB footprint and assembler compatibility.
• Limits of surface irregularities: visual inspection criteria and quantitative acceptance limits for defects (chips, ragged edges, cracks, flash, pull‑outs, crystallites, pores) to support quality control and supplier negotiations.
• Design considerations: Annex A provides general considerations underlying the EP‑core family design (mechanical and electrical interfaces).

Practical applications and users

Who uses IEC 63093-5:2018:

• Ferrite core manufacturers and suppliers - to manufacture to a common dimensional and surface‑quality specification.
• Magnetic component designers and electrical engineers - to select cores, compute effective parameters, and ensure interchangeability.
• PCB designers and mechanical engineers - to design footprints and mechanical assemblies using the specified pin grid and base outlines.
• Procurement, quality and inspection teams - to define acceptance criteria and to negotiate allowable surface irregularities with vendors.
• Test labs and compliance officers - to verify conformity with dimensional and surface defect limits.

Practical benefits:

• Ensures mechanical interchangeability across suppliers and designs.
• Reduces rework by aligning coil‑former and PCB footprint dimensions.
• Provides objective surface‑defect limits for acceptance sampling and supplier contracts.
• Supports accurate magnetic calculations when used with IEC 60205.

Related standards

• IEC 60205 - Calculation of the effective parameters of magnetic piece parts (referenced for Ae, le, Ve).
• IEC 60401‑1 - Terms and nomenclature for ferrite core irregularities.
• IEC 60424‑1 - General specification for limits of surface irregularities.
• Note: IEC 63093‑5:2018 replaces IEC 62317‑5:2015 and notably adds explicit limits for surface irregularities.

Keywords: IEC 63093-5:2018, EP-cores, ferrite cores, surface irregularities, coil formers, mechanical interchangeability, effective parameters, PCB pin grid.