ISO/IEC 11518-1:1995
Information technology — High-Performance Parallel Interface — Part 1: Mechanical, electrical and signalling protocol specification (HIPPI-PH)
Information technology — High-Performance Parallel Interface — Part 1: Mechanical, electrical and signalling protocol specification (HIPPI-PH)
- Статус документа:
- Действующий
- Формат:
- Электронный (PDF)
- Количество страниц:
- 44
- Дата публикации:
- 8 июня 1995 г.
- Издание:
- ISO/IEC IS 11518 edition 1 version 1
- ICS:
- 35.200
Provides the mechanical, electrical and signalling protocol specifications for an efficient simplex high-performance point-to-point interface between pieces of data-processing equipment. Facilitates the development and use of computer systems by providing a common interface at the physical and data framing layers. Provides an efficient interconnection between computers, high-performance display systems, and high-performance, intelligent block-transfer peripherals.
Abstract
ISO/IEC 11518-1:1995 - Overview
ISO/IEC 11518-1:1995 defines the mechanical, electrical and signalling protocol for the High-Performance Parallel Interface (HIPPI-PH) physical layer. It specifies a high-speed, simplex point-to-point interface optimized for large block transfers at peak data rates of 800 Mbit/s and 1600 Mbit/s, using twisted‑pair cabling up to 25 m. The standard provides the common physical and data‑framing layer needed to interconnect computers, high-performance displays, and intelligent block‑transfer peripherals.
Key topics and technical requirements
- Physical layer specification: connector pin assignments, cable and grounding requirements, differential and interconnect signal characteristics, and maximum connector footprint.
- Electrical and timing: CLOCK, DATA BUS and PARITY BUS timing, source/destination clock behavior, propagation delay and skew considerations.
- Signalling protocol & framing: physical framing hierarchy, data rate options, error detection (byte parity, LLRC) and burst/packet formats.
- Service interface: defined service primitives for connection management (initiate/complete), flow control, packet and data transfer, control and status primitives.
- State transitions & control logic: state diagrams, source/destination pseudo-code and READY/WAIT flow control mechanisms.
- Operational details & examples: waveform examples for connect/start/end sequences, burst handling, and annexes with implementation suggestions, error checking and component options.
- Design guidance: annexes cover cable selection, connector availability, byte ordering, sample LLRC circuits and propagation delay calculations.
Practical applications & who uses it
ISO/IEC 11518-1 is for organizations needing reliable, low‑latency, high‑bandwidth physical interconnects:
- System architects and hardware engineers designing high-performance servers, graphics subsystems, or intelligent block‑transfer peripherals.
- Embedded and interface designers implementing point‑to‑point data links where predictable latency and burst transfer efficiency matter.
- Data center engineers and integrators retrofitting or interfacing legacy HIPPI systems.
- Test labs and compliance teams validating mechanical, electrical and signalling conformance against HIPPI‑PH specifications.
HIPPI‑PH supports large file transfers, real‑time and variable‑size packet transfers, and is designed for circuit‑switched environments where rapid burst transfers and look‑ahead flow control maximize throughput.
Related standards
ISO/IEC 11518 is a multipart standard. Related parts include:
- Part 2: Framing Protocol (HIPPI‑FP)
- Part 3: Encapsulation of ISO 8802-3 (HIPPI‑LE)
- Part 4–6: Command mapping, Memory Interface, Physical Switch Control
Keywords: ISO/IEC 11518-1, HIPPI-PH, High-Performance Parallel Interface, physical layer, point-to-point interface, 800 Mbit/s, 1600 Mbit/s, burst transfer, LLRC, error detection, connector, cable specifications.
Технические детали
- Технический комитет
- ISO/IEC JTC 1/SC 25 - Interconnection of information technology equipment
- SKU
- ISO/IEC 11518-1:1995
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