Overview
IEC 63504-2804:2023 (IEEE Std 2804) - Software‑Hardware Interface for Multi‑Many‑Core - defines a standardized architecture description from the software design perspective. Commonly known as SHIM, this IEC/IEEE dual‑logo standard provides a common interface that abstracts hardware properties critical to enabling multicore and many‑core software tools. It is intended primarily for tool developers and hardware developers, and helps software teams understand the hardware information made available to compilers, RTOS configurators, performance analyzers and other development tools.
Key Topics
- Hardware abstraction for multicore tools: a common description model that separates software‑visible hardware properties from implementation details to improve tool interoperability.
- Performance estimation: guidance and metadata to support accurate performance prediction on complex processors, including VLIW cores and complex contention scenarios.
- Cache and memory description: explicit representation of caches, uncached memory regions, and subset caches (caches that cover only portions of memory).
- Communication and contention modeling: structures to define inter‑core communication, networks, and contention groups to enable realistic latency and throughput modeling.
- Power estimation: properties for coarse power consumption estimation to support early power analysis and tradeoffs.
- Reusability and modularity: separation of processor descriptions from memory/communication data using XML files (SHIM XML, e.g., shim20.xsd) and a Common Configuration File (CCF) concept for composing system descriptions.
- Extensibility and vendor extensions: mechanisms for vendors to add implementation‑specific metadata without breaking interoperability.
- Authoring rules and use cases: guidance for creating SHIM XML files and examples (auto‑parallelizing compilers, RTOS configuration tools, hardware modeling).
Applications
IEC 63504-2804 is practical for:
- Tool developers building compilers, auto‑parallelizers, static performance analyzers, and simulation tools that need consistent hardware descriptions.
- Hardware vendors supplying machine descriptions to third‑party software tools.
- System integrators and software architects performing early performance and power trade‑offs on multicore/many‑core platforms.
- RTOS and middleware configuration tools that must map software services to heterogeneous cores and communication fabrics.
Benefits include faster tool integration, improved cross‑vendor portability of toolchains, and more accurate early estimates of performance and power for multicore systems.
Related Standards
- IEC 63504-2804:2023 is published under the IEC/IEEE dual‑logo arrangement and corresponds to IEEE Std 2804. Consult the IEC/IEEE publication and the SHIM XML schema (shim20.xsd) for normative details.