Overview
IEC TR 63017:2015 - Flexible printed circuit boards (FPCBs) - Method of compensation of impedance variations - defines a practical method to compensate for impedance changes caused by applying noise suppression materials (NSMs) to FPCBs. The Technical Report describes how to adjust Cu linewidth to restore a designated characteristic impedance and how to measure impedance variation using time domain reflectometry (TDR). It is limited to measuring impedance variation that arises from Cu linewidth changes due to NSMs and does not prescribe FPCB materials or full layer structures.
Key topics and requirements
- Compensation method: Adjust Cu trace width (∆L) to compensate for impedance reduction introduced by NSMs on FPCBs.
- Measurement technique: Use TDR (time domain reflectometry) to obtain impedance profiles; set measurement parameters (dielectric constant, rise time, pulse width, measurement points) per test agreement.
- Test specimen design:
- Single board split into two halves: bare FPCB (microstrip) and shield FPCB (stripline with NSMs) for direct comparison under identical conditions.
- Test coupon length > 5 cm with SMA connectors at ends; Cu line widths varied (multiple LW patterns) for characteristic impedance mapping.
- Via holes recommended to ensure NSM contact with ground plane; via count/spacing agreed AABUS (as agreed between user and supplier).
- Calculation and acceptance:
- Typical target impedance: 50 Ω for single-ended, 100 Ω differential.
- Plot impedance vs. Cu linewidth for bare and shield conditions; determine the crossing point at the target impedance to compute required Cu linewidth compensation.
- Measurement precautions: Avoid direct hand contact (affects capacitance); follow TDR guidelines in Annex A and see annexes for theory, examples, hand contact effects, and test results.
Applications and who uses it
- Signal integrity engineers and FPCB designers compensating controlled-impedance traces when NSMs are used for EMI/EMC mitigation.
- FPCB manufacturers developing process specs to achieve target impedances after NSM application.
- Test labs and QA teams performing TDR verification and validating compensation strategies.
- EMI/EMC specialists assessing trade-offs between noise suppression and controlled-impedance performance.
Related standards
- IPC 2141A - referenced for TDR test setup and controlled-impedance measurement guidance.
- General controlled-impedance and signal-integrity best practices (TDR measurement, SMA interconnects, trace geometry) complement the report.
Keywords: IEC TR 63017:2015, flexible printed circuit boards, FPCBs, impedance compensation, noise suppression materials, NSMs, Cu linewidth, TDR, time domain reflectometry, controlled impedance.