Overview
ISO/IEC 24739-2:2009 - "Information technology - AT Attachment with Packet Interface - 7 - Part 2: Parallel transport protocols and physical interconnect (ATA/ATAPI‑7)" defines the AT Attachment (ATA/ATAPI) parallel interface between hosts and storage devices. The standard provides a common attachment interface for systems manufacturers, integrators, software suppliers and suppliers of intelligent storage devices to ensure interoperability and reliable data transfer over parallel ATA connections.
Key topics and technical requirements
The standard addresses both protocol and physical layers for parallel ATA. Major technical topics include:
- Transport protocols and command sets: PIO, Multiword DMA, DMA, PACKET, READ/WRITE DMA QUEUED and Ultra DMA command/transfer protocols and burst handling.
- Registers and addressing: I/O register descriptions, register addressing and host command layer behavior.
- Physical and electrical requirements: Cable configurations, driver types, connector styles (40‑pin, 4‑pin power, 50‑pin for 2.5 in, 68‑pin PCMCIA, unitized and 1.8 in connectors), and form‑factor definitions (3.5 in, 2.5 in, 1.8 in, 5.25 in).
- Signal assignments and descriptions: Detailed signal definitions (CS, DA, DD, DIOR/DIOW, DMARQ/DMACK, INTRQ, RESET, CBLID, etc.).
- Timing and signal integrity: Transfer timing, deskewing, Ultra DMA timing and CRC rules, and guidance on crosstalk, ringing, ground/power bounce and system capacitance.
- Cable detection and interoperability: Methods for host/device detection of cable type (CBLID), 80‑conductor cable considerations and guidelines for Ultra DMA reliability.
- Serial interface overview: High-level coverage of serial interface layers and host adapter register interfaces (as related parts of ATA family).
Practical applications
ISO/IEC 24739-2:2009 is used to:
- Design and validate host controllers, storage device firmware, and device drivers to ensure correct protocol behavior (PIO/DMA/UDMA).
- Specify and manufacture cables, connectors and PCBs that meet electrical and timing requirements for reliable parallel ATA operation.
- Diagnose signal‑integrity and timing issues in system integration and QA testing.
- Ensure interoperability across systems and storage devices from different vendors using the ATA/ATAPI‑7 specifications.
Who should use this standard
- Systems manufacturers and integrators
- Storage device designers and firmware engineers
- PCB and connector designers, test engineers focused on signal integrity
- Software and driver developers implementing ATA/ATAPI protocols
Related standards
Keywords: ATA/ATAPI‑7, AT Attachment, Parallel transport protocol, Ultra DMA, ATA connectors, signal integrity, storage device interface, CBLID, timing.