Overview
ISO/TR 24119:2015 - "Safety of machinery - Evaluation of fault masking serial connection of interlocking devices associated with guards with potential free contacts" - is a Technical Report that explains how fault masking can occur when multiple interlocking devices with potential‑free contacts are wired in series to a single logic unit that performs diagnostics. The report covers principles, examples (Figures 1–7), and a methodology to estimate the probability of fault masking and the maximum achievable diagnostic coverage (DC) for series‑connected interlocking devices. Note: it only applies when both channels are physical serial connections and excludes interlocking devices with integrated self‑monitoring.
Key topics and requirements
- Fault masking definitions and modes - direct masking, unintended reset, cable faults with unintended reset and how series wiring can hide faults from the logic unit.
- Cabling topologies - star, branch (trunk), loop and implications for masking risk.
- Methodology to evaluate DC - a 4‑step approach:
- Determine individual switch DC (per ISO 13849‑1, Annex E).
- Improve resistance to masking (design, diagnostics, cabling, device selection).
- Limit DC to the maximum achievable value using simplified (Clause 6.2 / Table 1) or regular (Clause 6.3) methods.
- Further reduce masking risk as needed (Clause 7).
- Simplified vs. regular methods - simplified tables give quick maximum DC limits (e.g., DC limited to medium or low depending on number/frequency of guards); regular method uses a fault‑masking probability level (FM) considering number of devices, actuation frequency, distance, accessibility and number of operators.
- Performance limits - fault masking can limit achievable Performance Level (PL) to PL d and restrict DC to medium or lower; the report warns against relying on unknown fault probabilities for higher PLs.
Practical applications
- Use ISO/TR 24119:2015 to:
- Assess series‑wired guard interlocking circuits for hidden failure accumulation.
- Calculate realistic DC limits when multiple potential‑free contacts feed one safety logic unit.
- Choose cabling topology and diagnostic measures to reduce masking (e.g., protected cabling, alternative diagnostics).
- Inform SRP/CS design decisions and risk assessments to avoid unsafe fault accumulation.
- Typical use cases: machine safety design reviews, risk assessments for production lines with multiple guards, retrofit safety upgrades, and preparation of documentation for conformity assessment.
Who should use this standard
- Safety engineers and machine designers specifying interlocking circuits.
- Control system designers and PLC/safety controller integrators.
- Maintenance planners, safety auditors, and conformity assessment bodies.
- Manufacturers selecting position switches/interlocks and cabling strategies.
Related standards
- ISO 13849‑1 (Safety‑related parts of control systems - DC and PL determination)
- ISO 14119 (Interlocking devices associated with guards - design and selection)
- IEC 60204‑1 (Electrical equipment of machines) - for cabling and polarity notes
Keywords: ISO/TR 24119:2015, fault masking, interlocking devices, potential free contacts, series connected devices, diagnostic coverage, DC, PL d, safety of machinery.