IEC 60191-6-21:2010

IEC 60191-6-21:2010 Overview

IEC 60191-6-21:2010 is an international standard issued by the International Electrotechnical Commission (IEC) focused on the mechanical standardization of semiconductor devices. Specifically, it addresses the general rules for preparing outline drawings of surface-mounted semiconductor device packages, with a detailed focus on measuring methods for package dimensions of Small Outline Packages (SOP). This standard corresponds to package outline form E, as defined in IEC 60191-4.

The primary purpose of IEC 60191-6-21 is to establish consistent, repeatable methods for measuring SOP semiconductor packages to ensure accuracy and uniformity in device packaging dimensions critical for manufacturing, assembly, and inspection processes in the electronics industry.

Key Topics Covered

• Scope and Normative References: Defines the application of the standard to SOP packages under IEC 60191-4 and refers to general rules covered in IEC 60191-6.

• Measuring Methods: Describes comprehensive procedures for dimension measurements including:

  • Mounting Height (A): Height from the seating plane to the top of the package.
  • Stand-off (A1): Distance from the seating plane to the lowest point of the package.
  • Body Thickness (A2): Thickness between the highest and lowest points of the package body.
  • Lead Widths and Thicknesses (bp, b1, c, c1): Precise measurement of lead dimensions both before and after plating.
  • Soldered Portion Length (Lp): Length of the lead segment intended for soldering.
  • Terminal Positional Tolerances: Acceptable deviations in lead tip positions from theoretical values.
  • Coplanarity: Assessment of the flatness of lead surfaces relative to the seating plane.

• Measurement Conditions: Methods account for measurements done with packages mounted on printed circuit boards (PCBs) or separately, using both manual and automated processes.

• Outline Drawing Preparation: Guidelines for creating standardized outline drawings for SOP packages, aiding in design, manufacturing, and quality assurance.

Applications

IEC 60191-6-21:2010 is fundamental for electronics manufacturers, designers, and quality control engineers who work with surface-mounted semiconductor devices, particularly those using Small Outline Packages. The standard provides practical value by enabling:

• Consistent Mechanical Specifications: Ensures semiconductor components meet mechanical tolerances, supporting reliability in assembly processes such as surface mount technology (SMT).

• Interoperability: Facilitates compatibility between semiconductor packages and PCB layouts by standardizing dimensional measurements and drawings.

• Quality Assurance: Offers precise measuring methodologies to verify package dimensions during production, reducing component failures and improving yield.

• Design Documentation: Supports the preparation of clear and internationally accepted outline drawings to benchmark mechanical device characteristics.

Key sectors benefiting from this standard include semiconductor fabrication, electronics assembly, automated optical inspection (AOI), and measurement instrumentation production.

Related Standards

IEC 60191-6-21 is part of the broader IEC 60191 series, which covers mechanical standardization for semiconductor devices. Important related standards include:

• IEC 60191-4: Defines coding systems and classification for the forms of package outlines, including Small Outline Packages (SOP).

• IEC 60191-6: Provides general rules for preparing outline drawings of surface-mounted semiconductor packages, forming the basis for part 6-21.

• Other Parts of IEC 60191: Address different package types and their mechanical requirements, useful for those dealing with a variety of semiconductor form factors.

These interconnected standards ensure comprehensive guidance encompassing a wide range of semiconductor device package measurements and drawings.

Conclusion

IEC 60191-6-21:2010 sets critical measurement standards for Small Outline Packages (SOP) in semiconductor devices, enabling manufacturers and designers to produce accurate, reliable surface-mounted components. By following these standardized mechanical measurement methods, stakeholders ensure device conformity and foster smooth integration within PCBs and electronic assemblies. This standard is essential for maintaining high-quality control and mechanical uniformity in today's global semiconductor supply chains.

For precise semiconductor device packaging measurement practices, adherence to IEC 60191-6-21 alongside its related standards is highly recommended.

Keywords: IEC 60191-6-21, Small Outline Package SOP, semiconductor device mechanical standardization, package dimension measurement, surface-mounted device packages, semiconductor outline drawings, IEC standards, SOP package measurement methods, package body thickness, lead positional tolerance.