IEC 61191-6:2010
Printed board assemblies - Part 6: Evaluation criteria for voids in soldered joints of BGA and LGA and measurement method
Printed board assemblies - Part 6: Evaluation criteria for voids in soldered joints of BGA and LGA and measurement method
- Статус документа:
- Действующий
- Формат:
- Электронный (PDF)
- Количество страниц:
- 76
- Дата публикации:
- 14 января 2010 г.
- Издание:
- IEC IS 61191 edition 1 version 1
- ICS:
- 31.180
IEC 61191-6:2010 specifies the evaluation criteria for voids on the scale of the thermal cycle life, and the measurement method of voids using X-ray observation. This part of IEC 61191 is applicable to the voids generated in the solder joints of BGA and LGA soldered on a board. This part of IEC 61191 is not applicable to the BGA package itself before it is assembled on a board. This standard is applicable also to devices having joints made by melt and re-solidification, such as flip chip devices and multi-chip modules, in addition to BGA and LGA. This standard is not applicable to joints with under-fill between a device and a board, or to solder joints within a device package. This standard is applicable to macrovoids of the sizes of from 10 µm to several hundred micrometres generated in a soldered joint, but is not applicable to smaller voids (typically, planar microvoids) with a size of smaller than 10 µm in diameter. This standard is intended for evaluation purposes and is applicable to research studies, off-line production process control and reliability assessment of assembly.
Abstract
Overview
IEC 61191-6:2010 is an international standard developed by the International Electrotechnical Commission (IEC) that specifies evaluation criteria and measurement methods for voids in soldered joints of Ball Grid Array (BGA) and Land Grid Array (LGA) components on printed circuit boards (PCBs). This standard addresses the critical quality assurance aspects of assemblies where void formation during soldering-specifically macrovoids ranging from 10 µm to several hundred micrometres-can significantly impact thermal cycle life and reliability.
Primarily designed for researchers, quality control teams, and electronics manufacturers, IEC 61191-6 provides a clear approach to identifying, measuring, and assessing voids using X-ray transmission imaging. It applies to solder joints formed by melt and re-solidification, including flip chip devices and multi-chip modules but excludes solder joints with under-fill or those inside device packages.
Key Topics
-
Scope and Applicability
Defines voids in solder joints of BGA, LGA, flip chip, and multi-chip modules soldered on boards. Excludes BGA packages before assembly and solder joints with under-fill or package-internal solder. -
Void Identification and Classification
Focuses on macrovoids between 10 µm and several hundred microns. Provides classification systems for void shapes and sizes, critical for understanding potential impacts on joint reliability. -
Measurement Techniques
Details procedures for void detection and measurement using X-ray transmission equipment. Covers optimal X-ray intensity settings, environment controls, and verification steps to ensure accurate void occupancy calculations. -
Void Occupancy Calculation
Introduces methods to quantify the total void volume or area relative to the solder joint cross-section, a key metric used to assess joint quality and predict thermal fatigue life reduction. -
Evaluation Criteria
Based on empirical data and simulations, the standard defines thresholds correlating void occupancy levels with thermal cycle life degradation, allowing process engineers to set acceptable quality limits. -
Reliability Impact
Addresses the influence of voids on the durability of solder joints subjected to thermal cycling stresses-critical for ensuring long-term electronics performance.
Applications
-
Assembly Quality Control
IEC 61191-6 guides printed circuit board assembly lines in monitoring and controlling solder joint quality, helping to reduce defects linked to voids. -
Reliability Assessment
Electronics manufacturers use the standard for off-line testing to evaluate potential impacts of voids on product lifespan under thermal cycling conditions. -
Process Optimization
By applying standardized void measurement methods, production engineers can optimize soldering parameters to minimize void formation, leading to improved yields and reliability. -
Research and Development
Researchers leverage the standard’s evaluation criteria to study the correlation between void characteristics and mechanical fatigue, advancing solder joint technology. -
Failure Analysis
Provides reference methods for diagnosing void-related joint failures, aiding in root cause investigations and corrective actions.
Related Standards
-
IEC 61191 Series
This standard is Part 6 of the IEC 61191 series covering printed board assemblies - other parts address design, solder paste materials, soldering processes, and inspection methodologies. -
IPC Standards
Industry standards from IPC, such as IPC-A-610 or IPC J-STD-001, complement IEC 61191-6 by providing broader solder joint acceptability criteria and process requirements. -
ISO/IEC Directives
IEC 61191-6 is drafted following ISO/IEC Directives to ensure harmonized global compliance and consistency across electrical and electronic standards. -
Electropedia and IEC Glossaries
International vocabulary referencing terms and definitions relevant to solder joint assembly and voids, facilitating standardized communication.
By adhering to IEC 61191-6:2010, electronics manufacturers and assembly technicians can reliably assess voids in BGA and LGA solder joints, reduce risk of premature failures, and enhance overall product quality. The use of standardized X-ray measurement methods aligned with defined evaluation criteria supports improved reliability assessments and advances industry best practices in printed board assemblies.
Технические детали
- Технический комитет
- TC 91 - Electronics assembly technology
- SKU
- IEC 61191-6:2010
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