PD IEC TR 61189-5-506:2019 PDF
Test methods for electrical materials, printed boards and other interconnection structures and assemblies - General test methods for materials and assemblies. An intercomparison evaluation to implement the use of fine-pitch test structures for…
Test methods for electrical materials, printed boards and other interconnection structures and assemblies - General test methods for materials and assemblies. An intercomparison evaluation to implement the use of fine-pitch test structures for…
- Статус документа:
- Действующий
- Формат:
- Электронный (PDF)
- Дата публикации:
- 31 июля 2019 г.
- ICS:
- 31.180
- SKU:
- PD IEC TR 61189-5-506:2019
Abstract
What is PD IEC TR 61189-5-506 - Surface insulation resistance (SIR) testing of solder fluxes about?
PD IEC TR 61189-5-506 is the fifth part of the international standard used for Test methods for electrical materials, printed boards other interconnection structures and assemblies. This methods helps in intercomparison evaluation to implement the use of fine pitch test structures for surface insulation resistance (SIR) testing of solder fluxes. PD IEC TR 61189-5-506 is an intercomparison supporting the development of IEC 61189-5-501 in relation to the SIR method. PD IEC TR 61189-5-506 sets out to validate the introduction of a new 200-μm gap SIR pattern and was benched marked against existing SIR gap patterns of 318 μm and 500 μm.
Who is PD IEC TR 61189-5-506 - Surface insulation resistance (SIR) testing of solder fluxes for ?
PD IEC TR 61189-5-506 on Test methods for electrical materials, printed boards and other interconnection structures and assemblies is useful for:
Manufacturers of electronic devices Electrical engineers Manufacturer...
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